december 2010 ?2010 fairchild semiconductor corporation FDMS86103L rev . c www.fairchildsemi.com 1 FDMS86103L n-channel power trench ? mosfet FDMS86103L n-channel powertrench ? mosfet 100 v, 49 a, 8 m features ? max r ds(on) = 8 m at v gs = 10 v, i d = 12 a ? max r ds(on) = 11 m at v gs = 4.5 v, i d = 10 a ? advanced package and silicon combination for low r ds(on) and high efficiency ? msl1 robust package design ? 100% uil tested ? rohs compliant general description this n-channel mosfet is produced using fairchild semiconductor?s advanced power trench ? process thant has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. application ? dc-dc conversion g s s s d d d d 5 6 7 8 3 2 1 4 bottom power 56 top pin 1 g s s s d d d d mosfet maximum ratings t a = 25 c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage 100 v v gs gate to source voltage 20 v i d drain current -continuous (package limited) t c = 25 c 49 a -continuous (silicon limited) t c = 25 c 81 -continuous t a = 25 c (note 1a) 12 -pulsed 100 e as single pulse avalanche energy (note 3) 312 mj p d power dissipation t c = 25 c 104 w power dissipation t a = 25 c (note 1a) 2.5 t j , t stg operating and storage junction temperature range -55 to +150 c r jc thermal resistance, junction to case 1.2 c/w r ja thermal resistance, junction to ambient (note 1a) 50 device marking device package reel size tape width quantity FDMS86103L FDMS86103L power 56 13 ?? 12 mm 3000 units
FDMS86103L n-channel power trench ? mosfet www.fairchildsemi.com 2 ?2010 fairchild semiconductor corporation FDMS86103L rev . c electrical characteristics t j = 25 c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diode characteristics symbol parameter test conditions min typ max units bv dss drain to source breakdown voltage i d = 250 a, v gs = 0 v 100 v bv dss t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c 68 mv/c i dss zero gate voltage drain current v ds = 80 v, v gs = 0 v 1 a i gss gate to source leakage current v gs = 20 v, v ds = 0 v 100 na v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 a 1.0 1.9 3.0 v v gs(th) t j gate to source threshold voltage temperature coefficient i d = 250 a, referenced to 25 c -7 mv/c r ds(on) static drain to source on resistance v gs = 10 v, i d = 12 a 6.4 8 m v gs = 4.5 v, i d = 10 a 8.4 11 v gs = 10 v, i d = 12 a, t j = 125 c 10.6 14 g fs forward transconductance v ds = 5 v, i d = 12 a 59 s c iss input capacitance v ds = 50 v, v gs = 0 v, f = 1 mhz 2790 3710 pf c oss output capacitance 469 625 pf c rss reverse transfer capacitance 22 35 pf r g gate resistance 1.3 t d(on) turn-on delay time v dd = 50 v, i d = 12 a, v gs = 10 v, r gen = 6 13 23 ns t r rise time 7.2 15 ns t d(off) turn-off delay time 35 57 ns t f fall time 613ns q g total gate charge v gs = 0 v to 10 v v dd = 50 v, i d = 12 a 43 60 nc q g total gate charge v gs = 0 v to 5 v 23 32 nc q gs gate to source charge 7.5 nc q gd gate to drain ?miller? charge 7 nc v sd source to drain diode forward voltage v gs = 0 v, i s = 2 a (note 2) 0.70 1.2 v v gs = 0 v, i s = 12 a (note 2) 0.78 1.3 t rr reverse recovery time i f = 12 a, di/dt = 100 a/ s 57 90 ns q rr reverse recovery charge 68 108 nc notes : 1. r ja is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r jc is guaranteed by design while r ca is determined by the user's board design. 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. 3. starting t j = 25 c, l = 1 mh, i as = 25 a, v dd = 90 v, v gs = 10 v a. 50 c/w when mounted on a 1 in 2 pad of 2 oz copper. b. 125 c/w when mounted on a minimum pad of 2 oz copper.
FDMS86103L n-channel power trench ? mosfet www.fairchildsemi.com 3 ?2010 fairchild semiconductor corporation FDMS86103L rev c typical characteristics t j = 25 c unless otherwise noted figure 1. 012345 0 20 40 60 80 100 v gs = 4 v v gs = 10 v v gs = 3 v v gs = 3.5 v v gs = 4.5 v pulse duration = 80 p s duty cycle = 0.5% max i d , drain current (a) v ds , drain to source voltage (v) on-region characteristics figure 2. 020406080100 0 1 2 3 4 5 v gs = 3 v pulse duration = 80 p s duty cycle = 0.5% max normalized drain to source on-resistance i d , drain current (a) v gs = 4.5 v v gs = 4 v v gs = 3.5 v v gs = 10 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n - r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 i d = 12 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 2345678910 0 10 20 30 40 t j = 125 o c i d = 12 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m : ) pulse duration = 80 p s duty cycle = 0.5% max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 12345 0 20 40 60 80 100 t j = 25 o c t j = 150 o c v ds = 5 v pulse duration = 80 p s duty cycle = 0.5% max t j = -55 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.001 0.01 0.1 1 10 100 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
FDMS86103L n-channel power trench ? mosfet www.fairchildsemi.com 4 ?2010 fairchild semiconductor corporation FDMS86103L rev c figure 7. 0 5 10 15 20 25 30 35 40 45 0 2 4 6 8 10 i d = 12 a v dd = 50 v v dd = 25 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 75 v gate charge characteristics figure 8. 0.1 1 10 100 10 100 1000 4000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.01 0.1 1 10 100200 1 10 100 t j = 100 o c t j = 25 o c t j = 125 o c t av , time in avalanche (ms) i as , avalanche current (a) u n c l a m p e d i n d u c t i v e switching capability figure 10. 25 50 75 100 125 150 0 20 40 60 80 limited by package v gs = 4.5 v r t jc = 1.2 o c/w v gs = 10 v i d , drain current (a) t c , case temperature ( o c ) m a x i m u m c o n t i n u o u s d r a i n current vs case temperature figure 11. 0.01 0.1 1 10 100 500 0.005 0.01 0.1 1 10 100 200 10 s 10 ms dc 1 s 100 ms 1 ms i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t ja = 125 o c/w t a = 25 o c fo rw ard bi as safe operating area f i g u r e 1 2 . s i n g l e p u l s e m a x i m u m po wer dissipation 10 -3 10 -2 10 -1 110 100 1000 0.5 1 10 100 1000 single pulse r t ja = 125 o c/w t a = 25 o c p ( pk ) , peak transient power (w) t, pulse width (sec) typical characteristics t j = 25 c unless otherwise noted
FDMS86103L n-channel power trench ? mosfet www.fairchildsemi.com 5 ?2010 fairchild semiconductor corporation FDMS86103L rev c figure 13. junction-to-ambient transient thermal response curve 10 -3 10 -2 10 -1 11 0 100 1000 0.001 0.01 0.1 1 2 single pulse r t ja = 125 o c/w duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a typical characteristics t j = 25 c unless otherwise noted
FDMS86103L n-channel power trench ? mosfet www.fairchildsemi.com 6 ?2010 fairchild semiconductor corporation FDMS86103L rev . c dimensional outlin e and pad layout c l l c pkg pkg 5.00 6.15 c 3.81 3.86 3.61 0.65 0.45 chamfer corner as pin #1 ident may appear as optional top view front view bottom view 1.27 3.81 1.27 6.61 3.91 4.52 1.27 123 4 8 5 6 7 1 4 8 5 land pattern recommendation 12 3 4 8 7 6 0.10 c a b 0.50 0.40 (8x) 4.01? .30 5 0.77 a b (0.34) 0.61 notes: unless otherwise specified a) package standard reference: jedec mo-240, issue a, var. aa, dated october 2002. b) all dimensions are in millimeters. c) dimensions do not include burrs or mold flash. mold flash or burrs does not exceed 0.10mm. d) dimensioning and tolerancing per asme y14.5m-1994. e) drawing file name: mkt-pqfn08frev1 see detail a detail a scale: 2:1 0.05 0.00 0.30 0.20 0.08 c 6.15 5.75 optional draft angle may appear on four sides of the package pin #1 ident may appear as optional seating plane 0.10 c 1.05 0.95 side view (3.44) 4.85 0.71 0.44 7 (0.63) 0.59 0.50 0.39 (0.30) 2.25
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